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december 2008 rev 1 1/19 AN2840 application note evlvip17-5wchg: 5 w low standby consumption battery charger demonstration board based on the viper17hn introduction the evlvip17-5wchg demonstration board is a 5 w smps for use as a travel battery charger for applications such as mobile phones, pdas and electronic games. the purpose of the board is to demonstrate the performance of the viper17hn off-line high voltage converter. thanks to its low consumption and other features, good electrical performance is achieved. to obtain constant output voltage and current regulation (cv/cc), the tsm1052 cv/cc controller is used on the secondary side. this tsm1052 is well-suited for this type of application, offering very low current consumption in a very small package (sot23-6l). another important feature of the smps is the elimination of the y1 safety capacitor between the primary and the secondary side. figure 1. evlvip17-5wchg demonstration board (top side) figure 2. evlvip17-5wchg demonstration board (bottom side) www.st.com
contents AN2840 2/19 contents 1 main characteristics and cir cuit description . . . . . . . . . . . . . . . . . . . . . 3 2 operating waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 no-load waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 short-circuit operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 electrical performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1 efficiency and no-load measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.2 v-i output characteristics and cable drop compensation . . . . . . . . . . . . . 12 5 conducted noise measur ements (pre-compliance test) . . . . . . . . . . . 14 6 thermal measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7 bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8 pcb layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
AN2840 main characteristics and circuit description 3/19 1 main characteristics and circuit description the following is a list of the main characteristics of the evlvip17-5wchg: input mains range: 90 - 264 v rms , f: 45 - 66 hz output parameters: 5.1 v dc 2%, 1 a 5%, cable drop compensation (0.2 v/a) no-load consumption: input power below 100 mw at high mains short-circuit protected with auto-restart at short removal pcb type and size: cem-1, single side 35 m, 53 x 26 mm safety: en60065 compliant emi: conforms to en55022 - class b standards the converter implements a flyback topology, whic h is ideal for low power, low cost isolated converters. on the primary side, the viper17hn is used. this ic is a member of the viper+ family, and benefits from its additional features and protections. this device, designed using a multi-chip approach, includes an advanced current mode pwm controller and an avalanche-rugged 800 v power mosfet in a small dip-7 package. the converter works in both continuous and discontinuous conduction mode depending on the input voltage (the circuit has a wide range input) and output load. the controller suffix ?h? specifies that the switching frequency is 1 15 khz, internally fixed, allowing the reduction of the power components. the application is designed to reduce overall component count and adapter cost. the input section includes a fuse resistor for inrush current limiting and fault protection, a rectifier bridge, two electrolytic bulk capacitors and an inductor as front-end ac-dc converter and emc filter. the transformer is a layer type, utilizing a standard ef12.6 ferrite core and is designed with approximately 75 v reflected voltage. the peculiarity of this transformer is the winding technique that eliminates the needs for the commonly-used y1 safety capacitor between the primary and the secondary side. an rcd clamp network is used for leakage inductance demagnetization. the startup of the circuit is managed by the internal high voltage startup generator of the viper17hn. this circuit sinks a typical current of 3 ma from the drain pin and charges the vdd capacitor. this current value is reduced to 0.6 ma when there is a protection intervention, in order to increase restart trial period and thus to reduce the stress on the power components in case of permanent fault. the power supply for the viper17hn is obtained by a self-supply winding from the transformer connected in a flyback configuration. this circuit provides a voltage that is, ideally, directly proportional to the output voltage. in practice, since this particular no y-cap transformer has a high leakage inductance, the self- supply voltage increases as the peak primary current increases. in any case, thanks to the wide v dd voltage range of the viper17hn (from 8.5 v to 23 v) the correct supply is always provided. the internal mosfet current limit is decreased (from the nominal value of 0.4 a) by using resistor r16 connected to the cont pin. with this function, the i dlim is fixed at about 280 ma, allowing the use of a small-sized transformer (ef12.6 for 5 w output) without risk of saturation.
main characteristics and circuit description AN2840 4/19 the brownout voltage divider is not mounted (so this feature is disabled) to save power, especially for the no-load consumption. the viper17hn has several built-in features, such as a frequency jittering to reduce emi problems, soft-start, and burst-mode operation for low power consumption during light load and no-load conditions. over-current, overload and over-temperature protections are also implemented internally and guarantee safe operation of the board. on the secondary side, the tsm1052 constant voltage constant current (cv/cc) controller is used. the tsm1052 and the photodiode of th e optocoupler are supplied directly from the output voltage. the wide supply voltage range of the tsm1052 (1.7 v min) allows accurate constant current regulation even with output voltages down to 1.5 v-1.6 v. this range is usually enough for all battery charger applications. when the output voltage falls below this limit the circuit loses regulation, the olp protection is invoked and the system starts working in hiccup mode. if, for some reason, current regulation is required down to the zero output voltage level (i.e. short-circuit), it is enough to supply the tsm1052 and the photodiode with a voltage equal to the sum of the output voltage and the voltage from tr1c winding rectified in a forward way. for more details on this specific schematic, please see application note an2448 (ultra small battery charger using tsm1052). the r7 resistor is added to provide the cable drop compensation. the higher the output current, the higher the output voltage measured on the output terminals of the pcb. in this way, the voltage drop on the cable that connects the unit to the load is compensated and the voltage supplied to the load is essentially cons tant. more in detail, since r7 equals r9, the output voltage increase is 0.2 mv per ma of ou tput current. this amount is chosen based on the typical cable resistance for these applications (typically around 0.2-0.3 ).
AN2840 main characteristics and circuit description 5/19 figure 3. electrical diagram ,&$ 6)+$; & q) , p+ ) 2kp: 5 2kp 5 . & ?) 9 5 10 5 2kp ' 6 =% )% *1' %5 ' ' &217 9'' ,& 9,3(5 & ?) 9 5 2kp & q ) 9 5 . 9fwuo *qg 2xw ,fwuo 9v 9ff ,& 760 5 10 & q) $& 9rxw9$ *1' 5 . 5 . 75 $ 5 2kp 75 % 75 & 75 ' 5 2kp & q ) 5 . 5 . 5 . & q) ' 6736/6 $& &prxqwhge\uhzrun 5 2kp & q) 5 2kp & q) 9 5 . 5 2kp ' 8)* & ?) 9 ' %$9:6 & ?) 9 ,&% 6)+$; 9$ & !-v
operating waveforms AN2840 6/19 2 operating waveforms figure 4 and figure 5 show some viper17hn waveforms during normal operation at full load (5 w). note that at low mains (115 v rms ) the converter operates in continuous conduction mode, while at 230 v rms it works in discontinuous conduction mode. this converter design takes advantag e of both operating modes. in the illustrations below, the vdd voltage powering the device and the feedback pin voltage are also shown. in figure 6 it is worth noting that once the circuit is working in dcm, the voltage on the fb pin has a triangular shape due to frequency jittering. the loop must adjust the fb pin voltage according to the actual switching frequency to keep the output voltage regulated. this happens because the transferred power in dcm is directly proportional to the switching frequency. hence, the low frequency sawtooth superimposed on the fb pin has the same frequency as the modulating frequency (250 hz typ.). on the drain waveform in figure 7 , the modulation depth of the jittering function is visible. the waveform is captured while synchronizing the scope on the rising edge and using the envelope acquisition. thus the trailing edge of the fo llowing switching cycle shows frequency variation that is id entical to the oscillator freque ncy with a variation depending on the jittering of the oscillator, in this case 115 khz and +/- 8 khz of modulation. figure 4. v in = 115 v ac ? 60 hz, full load, normal operation figure 5. v in = 230 v ac - 50 hz, full load, normal operation ch1: viper17hn drain pin (black trace) ch1: viper17hn drain pin (black trace) ch2: viper17hn vdd pin (green trace) ch2: viper17hn vdd pin (green trace) ch3: viper17hn fb pin (red trace) ch3: viper17hn fb pin (red trace) !-v !-v
AN2840 operating waveforms 7/19 in figure 8 , the drain voltage during full load operation at 265 v ac is captured. as specified to the right of the illustration, the maximum peak voltage on the drain pin is 536 v, assuring good derating for reliable operation of the device. figure 6. v in = 230 v ac - 50 hz, full load, fb pin behavior figure 7. v in = 230 v ac - 50 hz, full load, frequency modulation ch1: viper17hn drain pin (black trace) ch1: viper17hn drain pin (black trace) ch2: viper17hn vdd pin (green trace) ch3: viper17hn fb pin (red trace) figure 8. v in = 265 v ac - 50 hz, full load, maximum drain peak voltage ch1: viper17hn drain pin (black trace) !-v !-v !-v
operating waveforms AN2840 8/19 2.1 no-load waveforms during no-load conditions, the circuit operates in burst mode. thanks to the viper17hn high voltage startup generator, low current consumption, low vdd voltage at no-load and the low consumption of the tsm1052, the input power is less than 100 mw over the entire input voltage range. figure 9 and figure 10 show the main waveforms in this condition. during no-load operation, the burst frequency is around 1 khz. however, due to the very low peak current, acoustic noise is not generated on the board. figure 9. v in = 115 v ac - 50 hz in no- load condition figure 10. v in = 230 v ac - 50 hz in no- load condition ch1: viper17hn fb pin (yellow trace) ch1: viper17hn fb pin (yellow trace) ch2: viper17hn vdd pin (cyan trace) ch2: viper17hn vdd pin (cyan trace) ch3: viper17hn drain pin (purple trace) ch3: viper17hn drain pin (purple trace) ch4: output voltage (green) ch4: output voltage (green) !-v !-v
AN2840 short-circuit operation 9/19 3 short-circuit operation during output short-circuit conditions, the converter operates in hiccup mode (see figure 11 ) due to the activation of the overload protection (olp). operation at both 115 v ac and 230 v ac is very similar, since neither the v dd capacitor charge/discharge times nor the fb pin behavior depend on the bulk capacitor voltage. when a short-circuit is applied, the fb pin saturates high, and after about 8 ms th e capacitors connected to that pin are charged up to 4.8 v (typ) and the ovl protection is triggered. once the v dd capacitor is discharged down to 4.5 v (typ.), the high voltage startup generator is turned on with reduced current (0.6 ma typ), then when the v dd turn-on threshold is reached, the ic turns on and the cycle is repeated. normal operation is restored after the short is removed (auto restart behavior). as illustrated in figures 13 and 14 , even at 230 v ac the circuit behavior remains unchanged, and even at higher input voltage the working time in short-circuit condition is extremely short with respect to the off time. this permits limited dissipation for the power components and, since the components are not subject to excessive thermal stress, reliable operation of the circuit. even the drain voltage peak during this condition is well below the viper17hn maximum rating for that pin. figure 11. v in = 115 v ac - 60 hz short- circuit operation figure 12. v in = 230 v ac - 50 hz short- circuit operation detail ch1: viper17hn fb pin (yellow trace) ch1: viper17hn fb pin (yellow trace) ch2: viper17hn vdd pin (cyan trace) ch2: viper17hn vdd pin (cyan trace) ch3: viper17hn drain pin (purple trace) ch3: viper17hn drain pin (purple trace) ch4: output current (green) !-v !-v
short-circuit operation AN2840 10/19 figure 13. v in = 115 v ac - 60 hz short- circuit operation figure 14. v in = 230 v ac - 50 hz short- circuit operation detail ch1: viper17hn fb pin (yellow trace) ch1: viper17hn fb pin (yellow trace) ch2: viper17hn vdd pin (cyan trace) ch2: viper17hn vdd pin (cyan trace) ch3: viper17hn drain pin (purple trace) ch3: viper17hn drain pin (purple trace) ch4: output current (green) !-v !-v
AN2840 electrical performance 11/19 4 electrical performance 4.1 efficiency and no-load measurements ta bl e s 1 and 2 show board efficiency at the two nominal voltages. figure 15. efficiency vs output power table 1. efficiency at 115 v ac % load io [a] vo [v] po [w] iin [ma] pin [w] efficiency 25% 0.2501 5.118 1.2800 32.5 1.708 74.9% 50% 0.5005 5.165 2.5851 57.0 3.391 76.2% 75% 0.7507 5.205 3.9074 82.0 5.263 74.2% 100% 0. 9993 5.275 5.2713 106.6 7.19 73.3% average efficiency 74.7% table 2. efficiency at 230 v ac % load io [a] vo [v] po [w] iin [ma] pin [w] efficiency 25% 0.2501 5.118 1.2800 22.5 1.905 67.2% 50% 0.5004 5.163 2.5836 39.8 3.795 68.1% 75% 0.7507 5.197 3.9014 52.4 5.328 73.2% 100% 0. 9993 5.262 5.2583 67.4 7.256 72.5% average efficiency 70.2% !-v 2xwsxwsrzhu>:@ (iilflhqf\ 9df 9df
electrical performance AN2840 12/19 this adapter complies with the new epa 2.0 standard for low voltage devices (v out < 6, i out > 0.55 a). the minimum required efficiency for a 5 w smps is 68.2%. this value has to be calculated as the average of the efficiency at 25%, 50%, 75% and 100% of rated load. the input power without load has also been measured and as indicated in ta bl e 3 , the no- load consumption is always below 100 mw. therefore, this adapter using the viper17hn meets the most restrictive worldwide standard s regarding efficiency and power consumption at no-load (european code of conduct, adapter for mobile handheld battery-driven applications, starting from 1st january 2011: <150 mw). output voltage regulation during no-load operation is always good, and output voltage delivered is always within the specification. neither output voltage drops nor abnormal turn- off and restarting cycles are present during no-load operation or load transients. 4.2 v-i output characteristics and cable drop compensation figure 16 shows the v-i output characteristics at the pcb output pads and at end of the output cable, measured at 115 v ac mains input voltage. values at 230 v ac do not change significantly. due to the high performance of the tsm1052, in the constant current region the output voltage drops down to 1.5 v (1.3 v at the end of the output cable) while perfectly regulating the output current. a further decrease in the output load impedance, as in the case of a short-circuit, causes an additional decrease in the output voltage that is insufficient to power the tsm1052. this results in a hiccup working mode with a very low average output current. figure 16. output characteristic at 115 v ac table 3. no-load consumption 90v ac 100v ac 115v ac 230v ac 264v ac v out [v] 5.07 5.07 5.07 5.07 5.07 pin [mw] 48 49.5 52 81.5 95 !-v ,rxw>$@ 9rx w>9@ 3&%rxwsxw (qgrifdeoh
AN2840 electrical performance 13/19 this circuit behavior is present due to a design that uses the output voltage to power the tsm1052. thanks to the very low v cc of this device, the output current can be regulated even with a very small output voltage. this application implements a simple circuit which compensates the voltage drop on the output cable. the effect can be noted in figure 16 and ta bl e 4 , which show the output voltage measured at the output connector, after the output cable in different load conditions. with the cable drop compensation (cdc) the output voltage is nearly constant, while without cdc the output voltage drops down to 4.87 v (about -3.9%) at maximum load. the measurements are taken at 115 v ac , but even at different input mains voltages deviations are negligible (a few millivolts). figure 17. output voltage at output connector with and without cdc table 4. output voltage at output connector i out [a] 0 0.2 0.4 0.6 0.8 1 v out [v] with cdc 5.07 5.07 5.07 5.07 5.06 5.08 v out [v] without cdc 5.12 5.03 4.99 4.95 4.91 4.87 !-v ,rxw>$@ 9rxw>9@ 9rxwzr&'&>9@ 9rxwzlwk&'&>9@
conducted noise measurements (pre-compliance test) AN2840 14/19 5 conducted noise measurements (pre-compliance test) figure 18 and figure 19 provide the results of the conducted emission pre-compliance measurements performed at maximum nominal voltage (230 v ac ) with quasi-peak and average detection. for conciseness, only the measurements of the worst line wire are reported. the measurements show a good margin with respect to the limits stated in the en55022 class-b specifications. in comparing figures 18 and 19 , it is worth noting that the viper17hn frequency jittering feature makes it possible to spread the switching frequency harmonics spectrum and reduce the peak values. this is especially evident in the average measurement where a significant margin is achieved with respect to the limits. in figure 20 , the conducted emission in average mode is taken at 115 v ac , full load. as the graph shows even in this condition the measured noise is well below the en55022 class-b limits. figure 18. v in = 230 v ac ? 50 hz, full load ce qp measurement figure 19. v in = 230 v ac ? 50 hz full load ce average measurement figure 20. v in = 115 v ac - 60 hz ce average measurement !-v !-v !-v
AN2840 thermal measurements 15/19 6 thermal measurements a thermal analysis of the board is performed using an ir camera. the results are shown in figure 21 and figure 22 for 115 v ac and 230 v ac mains input. both im ages refer to full load condition (p out = 5 w). t a = 26 c for both figures emissivity = 0.95 for all points figure 21. v in = 115 v ac, full load, bottom and top sides figure 22. v in = 230 v ac , full load, bottom and top sides table 5. key component temperatures, full load point temperature [c] at 115 v ac temperature [c] at 230 v ac reference a 78.4 80.6 d4 (output diode) b 68.4 72.1 r1 (clamp) c 69.5 71.8 hot spot on pcb due to top side components d 65.6 66.4 r11 (output cu rrent sense resistor) e 73.7 74.1 ic2 (viper17hn) f 69.7 72.8 tr1 (transformer) !-v !-v
bill of materials AN2840 16/19 7 bill of materials table 6. evlvip17-5wchg bill of materials ref description package manufacturer c1, c2 electr.cap. 4.7 f 400 v 105 c sek ?8x11 p3.5 teapo/yageo c3 electr.cap. 10 f 50 v 105 c ?5x11 p2.5 c4 chip capacitor 1.5 nf/250 v x7r 0805 c5 chip capacitor 2.2 nf/25 v x7r 0603 c6 electr.cap. 1000 f 16 v 105 c sek ?10x16 p5 teapo/yageo c7 chip capacitor 220 nf/16 v x7r 0603 c8 chip capacitor 100 nf/25 v x7r 0603 c9 chip capacitor 330 nf/25 v x7r 0805 c10 chip capacitor 10 nf/50 v x7r 0603 c11 chip capacitor 1 nf/50 v x7r 0603 d1 single phase bridge s1zb60 mbs d2 diode uf108g d041 panjit d3 diode bav21ws sod323 d4 diode stps3l40s smc stmicroelectronics f1 fuse res. 10 5% 2 w i1 inductor 1 mh cecl-102k coils electr. ic1 opto sfh617-a3 x007 smt vishay ic2 i.c. viper17hn dip-7 stmicroelectronics ic3 i.c. tsm1052clt sot23-6l stmicroelectronics r1 chip resistor 330 k 5% 1206 r2 chip resistor 100 5% 1206 r4 chip resistor 22 5% 0603 r6 chip resistor 330 5% 0603 r7 chip resistor 22 k 1% 0603 r8 chip resistor 4.7 k 5% 0603 r9 chip resistor 22 k 1% 0603 r10 chip resistor 10 k 1% 0603 r11 chip resistor 0.2 1% 200 ppm 1206 r12 chip resistor 1.8 k 5% 0805 r13, r15, r18 chip resistor 0 0603 r14 chip resistor 10 k 5% 0603 r16 chip resistor 15 k 1% 0603 r17 chip resistor 0 1206 tr1 transformer 1802.0006 ef12.6 lp magnetica
AN2840 pcb layout 17/19 8 pcb layout figure 23. tht component layout (top side) figure 24. smt component layout (bottom side) and copper tracks !-v !-v
revision history AN2840 18/19 9 revision history table 7. document revision history date revision changes 09-dec-2008 1 initial release
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